ATMEL AT89C51 DATA CALLING
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At 89C51 features data calling to indicate the end of a write cycle during a write will result in the compliment of written datum on P0.7.
once write cycle is completed true data are valid on all output and next cycle may begin.
READ/BUSY bar:progress of byte programming can also be monitered by READY/BUSY bar output signal .P3.4 is pulled low after ALE goes high during programming to indicate busy . P3.4 is pulled high again when programming is done to indicate READY.
PROGRAMMING VERIFICATION
if the lock bit have not been programmed then the programmed code data can be read back via the address and data lines for verification.
CHIP ERASE
the entire flash array can be erase electrically by using proper combination of control signal and holding ALE/PROG bar low for 10 ms.
Every code bite in flash array can be written and the entire array can be erased by using the appropriate combination of control signal . The write operation cycle is self timed and once initiated will automatically time itself to completion.
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