ATMEL AT89C51 TIMER AND COUNTER
Many microcontroller applications require the counting of external events, such as, the frequency of a pulse train, or the generation of precise internal time delay between computer actions. Both of these task can be accomplished using software techniques, but software loops for counting or timing keep the processor occupied so that other, perhaps more important, function are not done .To relive the processor occupied of this burden, two 16-bit up counter, named T0 and T1 , are provided for general use of the programmer. Each counter may be programmed to count internal clock pulse, acting as a timer, or programmed to count external pulse as a counter.
The counter are divided into 8-bit register called the timer low (TL0, TL1) and high (TH0, TH1) bytes. All counter action is controlled by bit states in the timer mode control register (TMOD), the timer /counter control register (TCON), and certain program instructions.
TMOD is dedicated solely to two timers and can be considered to be two duplicate 4-bit register, each of which control the action of the timer .TCON has control bits and flags for the timers in the upper nibble, and control bits and flag for the external interrupts in the lower nibble.
TIMER COUNTER INTERRUPTS
The counters have been included on the chip to relieve the processor of timing and counting chores. When the program wishes to count a certain number of internal pulses or external events, a number is placed in one of the counters. The number represents the maximum count less the desired count, plus 1.The counter increments from the initial number to the maximum number and then rolls over to 0 on the final pulse and also sets the timer flag. The flag condition may be tested by an instruction to tell the program that the count has been accomplished, or the flag may be used to interrupt the program.
TIMER
If a counter programmed to be a timer, it will count the internal clock frequency of the 8051 oscillator divided by 12.As an example, if the crystal frequency is 6.0 MHz,
Then the timer clock will have a frequency of 500 KHz.
The resultant timer clock is gated to the timer by mean of the circuit. In order for oscillator clock pulses to reach the timer, the C/T`(“` “ as bar , C/ T bar) bit in the TMOD register must be set to 0 .Bit TRX in the TCON register must be set to 1 and gate bit in the TMOD register must be 0 , or external pin INTX` ( INTX bar ) must be a 1.In other words , the counter is configured as a timer, the timer pulses are gated to the counter by the run bit and the gate bit or the external input bits INTX` (INTX bar ).
figure 1
TIMER MODE OPERATION
The timer may operate in any one of four modes that are determined by the mode bits, M1
M0, in the TMOD register
TIMER MODE 0
Setting the timer X mode bits to 00b in the TMOD register results in using the THX
Register as an 8bit counter and TLX as a 5 bit counter, the pulse input is divided by 32d
That TH counts original oscillator frequency reduced by a total 384d.As an example, the 6 MHz oscillator frequency would result in a final frequency to TH of 15625 hertz. The Timer flag is set whenever THX goes from FFh to 00h or in .0164 seconds for a 6 megahertz crystal if THX starts at 00h.
TIMER MODE 1
Mode 1 is similar to mode 0 excepts TLX is configured as a full 8 bit counter when the mode bits are set to 01b in TMOD. The Timer flag would be set in .1311 seconds using a 6 MHz crystal.
TIMER MODE 2
Setting the mode bits to 10b in TMOD configure the timer to use the timer to use only the TLX counter as an 8 bit counter .THX is used to hold a value that is loaded into TLX every time TLX overflows from FFh to 00h. The Timer flag is also set when TLX overflow.
TIMER MODE 3
Timers 0 and 1 may be programmed to be in mode 0,1 or 2 independently of a similar mode for the other timer .This is not true for mode 3; the timers do not operate independently if mode 3 is chosen for timer 0.Placing timer 1 in mode 3 causes it to stop counting ; the control bit TR1 and the timer 1 flag TF1 are then used by timer 0.
Timer 0 in mode 3 become two completely separate 8 bit counters.TL0 is controlled by the gate arrangement of figure 1 and sets timer flag TF0 whenever it overflows from FFh to 00h.TH0 receive the timer clock under the control of TR1 only and sets the TF1 flag when overflows.
Timer 1 may still be used in modes 0,1,2 while timer 0 is in mode 3 with important exception – no interrupts will generated by timer 1 while timer 0 is using the TF1 overflow flag . Switching timer 1 to mode 3 will stop it. Timer 1 can be used for baud rate generation for the serial port, or any other mode 0, 1 or 2 functions that do not depend on interrupt for proper operation.
-COUNTER
The only difference between counting and timing is the source of the clock pulses to the counters. When used as timer, the clock pulses are sourced from the oscillator through the divided by 12d circuit .When used as counter, pin T0 supplies pulses to counter 0, and pin T1 to counter 1.The C/ (T bar) bit in TMOD must be set to 1 to enable pulses from the TX pin to reach the control circuit as shown in figure 1.
The input pulse on TX is sampled during P2 of state 5 every machine cycle. A change on the input from high to low between samples will increment the counter. Each high and low state of the input pulse must, thus, be held constant for at least one machine cycle to ensure reliable counting .Since this task 24 pulses, the maximum input frequency that can be accurately counted is the oscillator frequency divided by 24. For our 6 MHz crystal, the calculation yields a maximum external frequency of 250 KHz.Labels: ATMEL 89C51
