PROGRAMMING THE FLASH ATMEL 89C51
The AT89C51 is normally shipped with the on-chip flash memory array in the erased state.( it mean that contents=FFH), and ready to be programmed . The programming interface accepts either a high voltage (12 volt) or a few voltage programming mode provides a convenient way to program the AT89C51 inside the the user system, while the high voltage programming mode is compatible with conventional third party flash or EPROM programmers.
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the AT89C51 is shipped with either the high voltage or low voltage programming mode enabled.The respective top side marking and device signature codes are listed .
The AT89C51 code memory array is programmed bytes-by - bytes in either programming mode.To program any non-blank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.
Programming Algorithm: Before programming the AT89C51 , the address , data and control signals should beset up according to the flash programming mode table.
steps
1.Input the desired memory location on the data lines.
2.input the appropriate data bytes on the data lines.
3.activate the correct combination of control signals.
4.Raise EA bar / VPP to 12 V the high voltage programming mode.
5. Pulse ALE/PROG bar once to program a bytes in the Flash array or the lock bits.the byte-write cycle is self timed and typically takes no more than 1.5 ms . repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object files is reached.
DATA bar polling: The AT89C51 features DATA bar polling to indicate the end of the write cycle . During a write cycle , an attempted read of the of the last byte written will result in the compliment of the written datum on P0.7 .Once the write cycle has been completed , true dat are valid on all outputs, and the next cycle may begin . DATA bar polling may begin any time after a write cycle has been initiated.
READY/BUSY bar: The progress of byte programming can also be monitored by the RDY/BSY bar output signals.P3.4 is pulled low after ALE goes high during programming to indicate BUSY .P3.4 is pulled high again when programming is done to indicate READY.
PROGRAM VERFY: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification.The lock bits cannot be verified directly.Verification of the lock bits is achieved by observing that their features are enabled.
CHIP ERASE: The entire flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG bar low for 10 ms.The code array is written with all "1"s . The chip erase operation must be executed before the code memory can be re-programmed.
READING THE SIGNATURE BYTES: The signature bytes are read by the same procedure as a normal verification of locations 030H and 032H expect that P3.6 and P3.7 must be pulled to a logic low .The values returned are as follows.
(030 H )=1 EH indicates manufactured by ATMEL.
(031 H ) =51 H indicates 89C51.
( 032 H) =FFH indicates 12 V programming.
( 032 H )= 05H indicates 5 V programming.
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